CMOS technology has long been the dominant force in the field of VLSI (Very Large Scale Integration). However, like any other logic family, CMOS also has its limitations, which have been continuously addressed and improved over the years. Let's consider the example of processors, where process technology has seen rapid advancements, shrinking from 180nm in 1999 to 60nm in 2008, and now reaching 45nm. Efforts are underway to further reduce it to 32nm. Interestingly, while the initial focus was on reducing die area, recent developments have led to an increase in size due to the advantages of greater packing density and larger feature sizes. This means that more transistors can be accommodated on a single chip, enhancing overall performance and capabilities.